Platform Power Management Architect - AMD Instinct GPUs

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The Role

AMD is seeking a Platform Power Management Architect to define and drive endtoend power architecture for AMD Instinct data center GPU platforms. This role is responsible for systemlevel power strategy, spanning silicon capabilities, boardlevel power delivery, firmware, Linux power management, and rackscale deployment considerations.

The architect will work crossfunctionally with silicon, firmware, platform hardware, Linux kernel/ROCm software, and data center system teams to optimizeperformance per watt, ensure power integrity and reliability, and deliver accurate power projections for current and nextgeneration Instinct platforms. Exposure to scaleup or scaleout networking fabrics is highly desirable.

Key Responsibilities

Platform Power Architecture

• Define the endtoend power management architecture for AMD Instinct data center GPUs, spanning silicon, package, board, system, and rack levels.
• Own platformlevel power concepts including power states, power limits, throttling policies, telemetry, and powerperformance tradeoffs.
• Act as the technical authority for powerrelated architectural decisions across multiple Instinct programs.

Power Delivery & Rail Optimization

• Lead power rail architecture and optimization, including rail partitioning, sequencing, voltage/frequency domains, and efficiency tradeoffs.
• Partner with hardware and silicon teams to optimize VR efficiency, transient response, and steadystate power delivery under AI/HPC workloads.
• Influence silicon and platform features to improve power scalability and robustness across SKUs and deployment configurations.

Linux & Software Power Management

• Define requirements and architecture for Linuxbased power management, including interactions with kernel frameworks, drivers, firmware, and ROCm components.
• Collaborate with software teams on power telemetry, control interfaces, policy enforcement, and observability.
• Ensure alignment between platform power capabilities and softwarevisible controls for data center operators.
• Solid understanding of RTPM, ACPI and Suspend to Idle / S0ix flows.

Power Modeling & Projections

• Develop and own power projection methodologies for GPUs, platforms, and multiGPU systems across representative workloads.
• Provide power projections and sensitivity analyses to support product planning, system design, customer engagements, and thermal/rack planning.
• Validate projections against lab data and silicon characterization results, closing gaps between model and reality.

System & Fabric Awareness

• Incorporate scaleup (e.g., highbandwidth GPU interconnects) and scaleout (e.g., networking fabrics) considerations into platform power strategy.
• Understand and influence the power impact of interconnects, NICs, switches, and fabric topologies in large GPU clusters.
• Partner with fabric and system architects to ensure coherent power budgeting at node and rack scale.

CrossFunctional Leadership

• Drive alignment across silicon, firmware, hardware, Linux, ROCm, platform, and data center solution teams.
• Produce clear architectural documentation, power models, and executivelevel summaries.
• Represent platform power architecture in technical reviews with senior leadership and external partners.

Required Qualifications

• Expert-level background in platform, system, or silicon architecture with significant focus on power management.
• Strong understanding of power delivery networks (PDN), voltage regulation, rail optimization, and power integrity fundamentals.
• Handson experience with Linux power management concepts, kernel/driver interactions, or systemlevel power control.
• Experience building or consuming power models and projections for complex systems.
• Ability to work across hardware and software boundaries and influence architectural decisions.
• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field (Master's or PhD preferred).

Preferred Qualifications

• Experience with data center GPUs, accelerators, or highperformance SoCs.
• Exposure to scaleup GPU fabrics and/or scaleout data center networking.
• Familiarity with telemetry, power capping, workloadaware power management, or fleetlevel power optimization.
• Experience presenting architectural tradeoffs to senior technical leadership.
• Background in HPC or AI training/inference systems.

This role is not eligible for visa sponsorship.

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AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

This posting is for an existing vacancy.